1. Technical Field
The present invention relates to an image display apparatus and a method for controlling the image display apparatus.
2. Related Art
In a data processing system having a multiple-bit data bus, it has been known that simultaneous switching noise is produced. The simultaneous switching noise is produced when signals in a plurality of signal lines simultaneously change, causing EMI (ElectroMagnetic Interference) to worsen. In recent years, sophistication of data processing causes an increase in both signal speed and the number of bits in a data bus in a circuit substrate, making it difficult to take measures against the simultaneous switching noise. A method for reducing the simultaneous switching noise by delaying a signal in each signal line in a data bus for skew adjustment has therefore been proposed (see JP-A-2012-044488, for example).
The configuration described in JP-A-2012-044488 includes a buffer circuit and a delay circuit in correspondence with each signal line in a data bus, and the amount of delay provided by the delay circuit is determined based on a change in the signal in the signal line. Since the configuration described above has a complicated circuit configuration, a method for reducing the simultaneous switching noise in a simpler configuration has been desired. In an image data processing apparatus, in particular, a large amount of image data needs to be processed at high speed. In this case, complicated processing for reduction in simultaneous switching noise undesirably tends to cause a problem of delay in processing and other problems.